chip defect造句
造句與例句
手機(jī)版
- For the convenience of test , varied circuit chip defects caused by the production process are abstracted as all kinds of models . at present the commonly used fault models mainly consist of stuck - at fault , stuck - open fault , bridge fault , store fault , delay fault , etc . testing methods based on voltage testing mainly aim at stuck - at fault model and have also obtained satisfactory result in research for many years . bridge fault is tested easily by quiescent power supply current ( iddq ) testing method . in regard to stuck - open fault that is difficult to testd by quiescent power supply current ( iddq ) and voltage testing , it can is tested by the dynamic current ( iddt ) testing
為了便于測(cè)試,我們將生產(chǎn)過程中集成電路出現(xiàn)的多種多樣的缺陷抽象為各種模型。目前常用的故障模型主要有:固定故障,開路故障,橋接故障,存儲(chǔ)故障,時(shí)滯故障等。電壓測(cè)試主要針對(duì)固定型故障模型,多年的研究也取得了令人滿意的結(jié)果; cmos電路中的橋接故障則宜用穩(wěn)態(tài)電流測(cè)試方法( iddq )測(cè)試;對(duì)于電壓和穩(wěn)態(tài)電流難以測(cè)試的開路故障,可以使用瞬態(tài)電流測(cè)試( iddt )的方法進(jìn)行測(cè)試。 - It's difficult to see chip defect in a sentence. 用chip defect造句挺難的
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